Introduction - Freescale Semiconductor MCF5329 Reference Manual

Chapter 7
Clock Module
7.1

Introduction

The clock module allows the device to be configured for one of several clocking methods. Clocking modes
include internal phase-locked loop (PLL) clocking with an external clock reference or an external crystal
reference supported by an internal crystal amplifier. The PLL can also be disabled and an external
oscillator can be used to clock the device directly. The clock module contains:
• Crystal amplifier and oscillator (OSC)
• Dithering phase-locked loop (PLL)
• Status and control registers
• Control logic
Throughout this manual, f
the internal bus frequency.
Figure 7-1 is a high level representation of the clock connections. The exact functionality of the blocks is
not illustrated (e.g. clocks to the SDRAMC and USB are disabled when the device is in limp mode, and
the clocks to individual modules may be disabled via the peripheral power management registers).
Freescale Semiconductor
NOTE
refers to the core frequency and f
sys
MCF5329 Reference Manual, Rev 3
refers to
sys/3
7-1