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Field
31–13
Reserved, should be cleared.
12–9
Counter mode modulus. Specifies modulus size for counter mode. In counter mode, the initial counter value is
CTRM
incremented modulo 2
8
Disable key parity check. Disables checking DES parity.
DKP
0 Check for DES key parity errors
1 Do not check for DES key parity errors
Note: A mode error is generated if this bit is set to one while in AES mode.
7–5
Reserved, should be cleared.
4–3
Cipher mode. Selects the cipher mode.
CM
00 ECB
01 CBC
10 Reserved
11 CTR
2
Direction. Selects encryption or decryption.
DIR
0 Decrypt
1 Encrypt
1–0
Algorithm. Selects which algorithm the SKHA module uses.
ALG
00 AES
01 DES
10 3DES
11 Reserved
35.2.2
SKHA Control Register (SKCR)
The SKCR contains bits that should be set after a hardware reset.
Freescale Semiconductor
Table 35-2. SKMR Field Descriptions
Description
N
.
CTRM
0000
0001
...
0110
0111
1000
1001
...
1110
1111
1
If CTRM is set to reserved settings for DES or
3DES, a mode error occurs.
MCF5329 Reference Manual, Rev 3
Symmetric Key Hardware Accelerator (SKHA)
CTR Modulus
DES or 3DES
AES
8
8
2
2
16
16
2
2
...
...
56
56
2
2
64
64
2
2
1
72
Reserved
2
1
80
Reserved
2
...
...
1
120
Reserved
2
1
128
Reserved
2
35-7
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