Freescale Semiconductor MCF5329 Reference Manual page 20

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24.2.3 SSI_MCLK - Serial Master Clock .............................................................................. 24-5
24.2.4 SSI_FS - Serial Frame Sync........................................................................................ 24-5
24.2.5 SSI_RXD - Serial Receive Data ................................................................................. 24-5
24.2.6 SSI_TXD - Serial Transmit Data ................................................................................ 24-6
24.3 Memory Map/Register Definition................................................................................................ 24-7
24.3.1 SSI Transmit Data Registers 0 and 1 (SSI_TX0/1) ...................................................... 24-8
24.3.2 SSI Transmit FIFO 0 and 1 Registers ........................................................................... 24-9
24.3.3 SSI Transmit Shift Register (TXSR) ............................................................................. 24-9
24.3.4 SSI Receive Data Registers 0 and 1 (SSI_RX0/1) ..................................................... 24-10
24.3.5 SSI Receive FIFO 0 and 1 Registers .......................................................................... 24-11
24.3.6 SSI Receive Shift Register (RXSR)............................................................................. 24-11
24.3.7 SSI Control Register (SSI_CR) ................................................................................... 24-13
24.3.8 SSI Interrupt Status Register (SSI_ISR) ...................................................................... 24-15
24.3.9 SSI Interrupt Enable Register (SSI_IER) .................................................................... 24-20
24.3.10 SSI Transmit Configuration Register (SSI_TCR) ....................................................... 24-21
24.3.11 SSI Receive Configuration Register (SSI_RCR)......................................................... 24-23
24.3.12 SSI Clock Control Register (SSI_CCR) ...................................................................... 24-24
24.3.13 SSI FIFO Control/Status Register (SSI_FCSR) .......................................................... 24-25
24.3.14 SSI AC97 Control Register (SSI_ACR) ...................................................................... 24-27
24.3.15 SSI AC97 Command Address Register (SSI_ACADD) ............................................. 24-28
24.3.16 SSI AC97 Command Data Register (SSI_ACDAT) ................................................... 24-29
24.3.17 SSI AC97 Tag Register (SSI_ATAG) ......................................................................... 24-29
24.3.18 SSI Transmit Time Slot Mask Register (SSI_TMASK).............................................. 24-30
24.3.19 SSI Receive Time Slot Mask Register (SSI_RMASK) ............................................... 24-30
24.4 Functional Description ............................................................................................................... 24-30
24.4.1 Detailed Operating Mode Descriptions ....................................................................... 24-30
24.4.2 SSI Clocking ................................................................................................................ 24-43
24.4.3 External Frame and Clock Operation .......................................................................... 24-46
24.4.4 Supported Data Alignment Formats ............................................................................ 24-46
24.4.5 Receive Interrupt Enable Bit Description .................................................................... 24-48
24.4.6 Transmit Interrupt Enable Bit Description .................................................................. 24-48
24.5 Initialization/Application Information ....................................................................................... 24-49
25.1 Introduction .................................................................................................................................. 25-1
25.1.1 Overview........................................................................................................................ 25-1
25.1.2 Features .......................................................................................................................... 25-2
25.1.3 Modes of Operation ....................................................................................................... 25-2
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Contents
Title
Chapter 25
Real-Time Clock
MCF5329 Reference Manual, Rev 3
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Number
Freescale Semiconductor