Freescale Semiconductor MCF5329 Reference Manual page 849

15 14 13
0x0
Command Sequence:
Operand Data: None
Result Data: Command complete status (0xFFFF) is returned when the register write is
complete.
36.4.1.5.10 Read Control Register (
Read the selected control register and return the 32-bit result. Accesses to the processor/memory control
registers are always 32 bits wide, regardless of register width. The second and third words of the command
form a 32-bit address, which the debug module uses to generate a special bus cycle to access the specified
control register. The 12-bit Rc field is the same the processor's MOVEC instruction uses.
Command/Result Formats:
15 14
Command
Result
Command Sequence:
RCREG
??? 'NOT READY'
Operand Data: The only operand is the 32-bit Rc control register select field.
Freescale Semiconductor
12 11 10 9
0x0
Figure 36-33.
SYNC
SYNC_PC
???
Figure 36-34.
SYNC
RCREG
13 12 11 10
0x2 0x9
0x0 0x0
0x0
Figure 36-35.
RCREG
MS ADDR MS ADDR
'NOT READY'
Figure 36-36.
RCREG
MCF5329 Reference Manual, Rev 3
8 7 6 5
0x0
_ Command Format
PC
NEXT CMD
CMD COMPLETE
_ Command Sequence
PC
)
9 8 7 6 5
0x8
0x0
Rc
D[31:16]
D[15:0]
Command/Result Formats
READ
CONTROL
'NOT READY'
REGISTER
NEXT CMD
MS RESULT
Command Sequence
Debug Module
4 3 2 1
0x1
4 3 2 1 0
0x0
0x0
XXX
NEXT CMD
LS RESULT
XXX NEXT CMD
BERR 'NOT READY'
0
36-33