Freescale Semiconductor MCF5329 Reference Manual page 240

Devices supported: mcf5327; mcf5328; mcf53281; mcf5329
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General Purpose I/O Module
Address
0xFC0A_400B PODR_TIMER
0xFC0A_400D PODR_LCDDATAH
0xFC0A_400E PODR_LCDDATAM
0xFC0A_400F PODR_LCDDATAL
0xFC0A_4010 PODR_LCDCTLH
0xFC0A_4011 PODR_LCDCTLL
0xFC0A_4014 PDDR_FECH
0xFC0A_4015 PDDR_FECL
0xFC0A_4016 PDDR_SSI
0xFC0A_4017 PDDR_BUSCTL
0xFC0A_4018 PDDR_BE
0xFC0A_4019 PDDR_CS
0xFC0A_401A PDDR_PWM
0xFC0A_401B PDDR_FECI2C
0xFC0A_401D PDDR_UART
0xFC0A_401E PDDR_QSPI
0xFC0A_401F PDDR_TIMER
0xFC0A_4021 PDDR_LCDDATAH
0xFC0A_4022 PDDR_LCDDATAM
0xFC0A_4023 PDDR_LCDDATAL
0xFC0A_4024 PDDR_LCDCTLH
0xFC0A_4025 PDDR_LCDCTLL
0xFC0A_4028 PPDSDR_FECH
0xFC0A_4029 PPDSDR_FECL
0xFC0A_402A PPDSDR_SSI
0xFC0A_402B PPDSDR_BUSCTL
0xFC0A_402C PPDSDR_BE
0xFC0A_402D PPDSDR_CS
0xFC0A_402E PPDSDR_PWM
0xFC0A_402F PPDSDR_FECI2C
13-12
Table 13-3. GPIO Module Memory Map (continued)
Register
Port Data Direction Registers
Port Pin Data/Set Data Registers
MCF5329 Reference Manual, Rev 3
Width
Access Reset Value
(bits)
8
R/W
0x0F
8
R/W
0x03
8
R/W
0xFF
8
R/W
0xFF
8
R/W
0x01
8
R/W
0xFF
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
0x00
8
R/W
See Section
8
R/W
See Section
8
R/W
See Section
8
R/W
See Section
8
R/W
See Section
8
R/W
See Section
8
R/W
See Section
8
R/W
See Section
Freescale Semiconductor
Section/Page
13.3.1/13-14
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