Memory Map/Register Definitions - Freescale Semiconductor MCF5329 Reference Manual

Table 20-2. Internal Control and Status Bits for USB Host Module (continued)
Signal
Interrupt Mask
On-chip Transceiver
Pull-down Enable
20.3

Memory Map/Register Definitions

This section provides the memory map of the USB host module. Descriptions of these registers can be
found in Chapter 21, "Universal Serial Bus Interface – On-The-Go Module."
in the below table for direct links to the corresponding register description. Addresses and reset values
shown here are correct for the USB host module.
Address
0xFC0B_4000 Identification Register (ID)
0xFC0B_4004 General Hardware Parameters (HWGENERAL)
0xFC0B_4008 Host Hardware Parameters (HWHOST)
0xFC0B_4010 TX Buffer Hardware Parameters (HWTXBUF)
0xFC0B_4014 RX Buffer Hardware Parameters (HWRXBUF)
0xFC0B_4100 Host Interface Version Number (HCIVERSION)
0xFC0B_4103 Capability Register Length (CAPLENGTH)
0xFC0B_4104 Host Structural Parameters (HCSPARAMS)
0xFC0B_4108 Host Capability Parameters (HCCPARAMS)
0xFC0B_4140 USB Command (USBCMD)
0xFC0B_4144 USB Status (USBSTS)
0xFC0B_4148 USB Interrupt Enable (USBINTR)
0xFC0B_414C USB Frame Index (FRINDEX)
0xFC0B_4154 Periodic Frame List Base Address (PERIODICLISTBASE)
0xFC0B_4158 Current Asynchronous List Address (ASYNCLISTADDR)
Freescale Semiconductor
Mnemonic
Interript enable. When set, changes
on WKUP cause an interrupt to be
UHMIE
asserted.
When cleared, the interrupt is masked.
Enables 50 kΩ pull-downs on the host
XPDE
controller's DM and DP pins
Table 20-3. USB Host Controller Memory Map
Register
Module Identification Registers
Capability Registers
Operational Registers
MCF5329 Reference Manual, Rev 3
Universal Serial Bus Interface – Host Module
Direction Access
R/W
R/W
See the Section/Page heading
Width
Reset
(bits)
N 32 R 0x0041_FA05
N 32 R 0x0000_02C5
N 32 R 0x1002_0001
N 32 R 0x8004_0404
N 32 R 0x0000_0404
Y 16 R 0x0100
Y 8 R 0x40
Y 32 R 0x0001_0011
Y 32 R 0x0000_0006
Y 32 R/W 0x0008_0B00
Y 32 R/W 0x0000_1000
Y 32 R/W 0x0000_0000
Y 32 R/W 0x0000_0000
Y 32 R/W 0x0000_0000
Y 32 R/W 0x0000_0000
Interrupt
Trigger?
N/A
N
Section/Page
21.3.1.1/21-9
21.3.1.2/21-10
21.3.1.3/21-11
21.3.1.5/21-12
21.3.1.6/21-12
21.3.2.1/21-13
21.3.2.4/21-15
21.3.2.3/21-14
21.3.2.4/21-15
21.3.3.1/21-17
21.3.3.2/21-19
21.3.3.3/21-21
21.3.3.4/21-23
21.3.3.5/21-24
21.3.3.7/21-25
20-5