Freescale Semiconductor MCF5329 Reference Manual page 799

Devices supported: mcf5327; mcf5328; mcf53281; mcf5329
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encryption. The processor supplies data to the module that is processed as 128-bit input. The SKHA engine
performs ten rounds for encryption or decryption. AES operates in ECB, CBC, and CTR modes.
Plaintext blocks
128-bit
128-bit
block n
block n-1
35.1.1.3
Electronic Code Book (ECB) Cipher Mode
The simplest mode is ECB. Each block is processed independently, as shown in
context used in this mode. Each block of plaintext is encrypted to determine the corresponding ciphertext.
In decrypt mode, the ciphertext blocks are decrypted to restore the plaintext.
Encrypt(k)
Cipher 1
Decrypt(k)
35.1.1.4
Cipher Block Chaining (CBC) Cipher Mode
Cipher Block Chaining mode encrypts the output of the previous block with the current block input as
shown in
Figure
35-5. For decryption, the previous ciphertext block is mixed with the decrypted block as
shown in
Figure
35-6. A 128-bit random initialization vector (IV) must be loaded prior to processing a
message. The context registers are updated internally and must be read and restored during a context
switch.
Freescale Semiconductor
128-bit key
128-bit
...
128-bit
block 1
block 2
Figure 35-3. AES Encryption Process
Plain 1
Plain 2
Encrypt(k)
Cipher 2
Decrypt(k)
Plain 2
Plain 1
Figure 35-4. ECB Mode Processing
MCF5329 Reference Manual, Rev 3
Symmetric Key Hardware Accelerator (SKHA)
Ciphertext blocks
128-bit
128-bit
block n
block n-1
AES
Plain 3
Encrypt(k)
Encrypt(k)
Cipher 3
Cipher N
Decrypt(k)
Decrypt(k)
Plain N
Plain 3
128-bit
...
128-bit
block 1
block 2
Figure
35-4. There is no
Plain N
35-3

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