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21.3.2
Capability Registers
Specifies software limits, restrictions, and capabilities of the host/device controller implementation. Most
of these registers are defined by the EHCI specification. Registers not defined by the EHCI specification
are noted in their descriptions.
21.3.2.1
Host Controller Interface Version Register (HCIVERSION)
This is a two-byte register containing a BCD encoding of the EHCI revision number supported by this
OTG controller. The most-significant byte of the register represents a major revision; the least-significant
byte is the minor revision.
Address: 0xFC0B_0100 (HCIVERSION)
15
14
13
R
W
Reset
0
0
0
Figure 21-9. Host Controller Interface Version Register (HCIVERSION)
Field
15–0
EHCI revision number. Value is 0x0100 indicating version 1.0.
HCIVERSION
21.3.2.2
Capability Registers Length Register (CAPLENGTH)
Register is used as an offset to add to the register base address to find the beginning of the operational
register space, the location of the USBCMD register.
Address: 0xFC0B_0103 (CAPLENGTH)
7
R
W
Reset:
0
Figure 21-10. Capability Registers Length Register (CAPLENGTH)
Field
7–0
Capability registers length. Always 0x40.
CAPLENGTH
Freescale Semiconductor
Figure 21-9
shows the HCIVERSION register.
12
11
10
9
0
0
0
0
Table 21-11. HCIVERSION Field Descriptions
6
5
1
0
Table 21-12. CAPLENGTH Field Descriptions
MCF5329 Reference Manual, Rev 3
Universal Serial Bus Interface – On-The-Go Module
8
7
6
5
HCIVERSION
1
0
0
0
Description
4
3
2
CAPLENGTH
0
0
0
Description
Access: User read-only
4
3
2
1
0
0
0
0
Access: User read-only
1
0
0
0
21-13
0
0
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