Freescale Semiconductor MCF5329 Reference Manual page 906

Revision History
Table B-1. MCF5329RM Rev 2 to Rev. 3 Changes (continued)
Chapter
LCD Controller Changed LCD_DCR[BURST] from read-only to read/write.
Changed note after LCD_DCR figure from using 8-bit burst to 16-bit.
Changed LCD_GWSAR register from read-only to read/write.
Changed LCD_GWPR[GWXP] bit description from "...in pixel count (from 0 to GW_XMAX)." to "...in pixel count
(from 0 to XMAX)."
Changed LCD_GWPR[GWYP] bit description from "...in pixel count (from 0 to GW_YMAX)." to "...in pixel count
(from 0 to YMAX)."
Corrected LCD_GWCR section stem sentence.
Changed note in LCD_PCR[PCD] bit description to "Set PCD so that the LCD_LSCLK frequency is less than
one-third (TFT mode) or one-fourth (CSTN mode) of the system bus clock (f
line data (LCD_D) is incorrect."
FlexCAN Corrected step 3 in Receive Process section from "Control/status word to mark the Rx MB as active and empty
(CODE = 1000)" to "Control/status word to mark the Rx MB as active and empty (CODE = 0100)"
SSI Reworded sentences and added tables to register bit descriptions for clarity throughout.
Changed maximum bit frequency to internal bus clock frequency ratio from 1/4 to 1/5 throughout.
Changed MSB to msb and LSB to lsb throughout.
RTC Changed reset value of RTC_DAYS from undefined to 0x0000_0000.
Added "plus one minute" and note to RTC stopwatch register description.
Corrected RTC_CR[SWR] bit description
PWM Changed bit description of PWME[PWME7].
PIT Corrected PCSRn address in memory map table from 0xFC07_8000 to 0xFC08_8000
Corrected PIT timeout period equation.
DMA Timers Clarified DTMRn[PS] field description.
In the section Features, updated the maximum timeout period information
In the table DTMRn Field Descriptions, added the sentence "Avoid setting CLK when RST is set..." to the CLK
row description
QSPI Updated the Introduction section's text
In the section External Signal Description, updated the final paragraph
In the table QDLYR Field Descriptions, updated the 15 SPE row
Updated the table QDR Field Descriptions
Updated the second paragraph of the section QSPI RAM
Updated the first paragraph of the section Receive RAM
Reserved QMR[14] bit (previously DOHIE bit).
UART Reworded note below UART block diagram.
Corrected note in UIPn[CTS] bit description from "...and value as UIPCRn[RTS]." to "...and value as
UIPCRn[CTS]."
RNG Added note in overview section.
Added link to NIST SP800-90 in the overview section.
B-4
Description
MCF5329 Reference Manual, Rev 3
) frequency. Otherwise, the
sys/3
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