Freescale Semiconductor MCF5329 Reference Manual page 724

UART Modules
Address
UART0
UART1
UART2
0xFC06_0000 UART Mode Registers
0xFC06_4000
0xFC06_8000
0xFC06_0004 UART Status Register (USRn)
0xFC06_4004
UART Clock Select Register
0xFC06_8004
0xFC06_0008 UART Command Registers (UCRn)
0xFC06_4008
0xFC06_8008
0xFC06_000C UART Receive Buffers (URBn)
0xFC06_400C
UART Transmit Buffers (UTBn)
0xFC06_800C
0xFC06_0010 UART Input Port Change Register (UIPCRn)
0xFC06_4010
UART Auxiliary Control Register (UACRn)
0xFC06_8010
0xFC06_0014 UART Interrupt Status Register (UISRn)
0xFC06_4014
UART Interrupt Mask Register (UIMRn)
0xFC06_8014
0xFC06_0018 UART Baud Rate Generator Register (UBG1n)
0xFC06_4018
0xFC06_8018
0xFC06_001C UART Baud Rate Generator Register (UBG2n)
0xFC06_401C
0xFC06_801C
0xFC06_0034 UART Input Port Register (UIPn)
0xFC06_4034
0xFC06_8034
0xFC06_0038 UART Output Port Bit Set Command Register (UOP1n)
0xFC06_4038
0xFC06_8038
0xFC06_003C UART Output Port Bit Reset Command Register (UOP0n)
0xFC06_403C
0xFC06_803C
1
UMR1n, UMR2n, and UCSRn must be changed only after the receiver/transmitter is issued a software reset command. If
operation is not disabled, undesirable results may occur.
2
Reading this register results in undesired effects and possible incorrect transmission or reception of characters. Register
contents may also be changed.
31-4
Table 31-2. UART Module Memory Map
Register
1
(UMR1n), (UMR2n)
1
(UCSRn)
MCF5329 Reference Manual, Rev 3
Width
Access Reset Value Section/Page
(bit)
8 R/W 0x00
8 R 0x00
8 W See Section
8 W 0x00
8 R 0xFF
8 W 0x00
8 R See Section
8 W 0x00
8 R 0x00
8 W 0x00
2
8 W 0x00
2
8 W 0x00
8 R 0xFF
2
8 W 0x00
2
8 W 0x00
Freescale Semiconductor
31.3.1/31-5
31.3.2/31-6
31.3.3/31-8
31.3.4/31-9
31.3.5/31-9
31.3.6/31-11
31.3.7/31-12
31.3.8/31-12
31.3.9/31-13
31.3.10/31-13
31.3.11/31-15
31.3.11/31-15
31.3.12/31-15
31.3.13/31-16
31.3.13/31-16