Table of Contents
Advertisement
FlexBus
Field
31–16
Base address mask. Defines the chip-select block size by masking address bits. Setting a BAM bit causes the
BAM
corresponding CSAR bit to be a don't care in the decode.
0 Corresponding address bit is used in chip-select decode.
1 Corresponding address bit is a don't care in chip-select decode.
The block size for FB_CSn is 2
For example, if CSAR0 equals 0x0000 and CSMR0[BAM] equals 0x0008, FB_CS0 addresses two discontinuous
64-Kbyte memory blocks: one from 0x0_0000 – 0x0_FFFF and one from 0x8_0000 – 0x8_FFFF.
Likewise, for FB_CS0 to access 32 Mbytes of address space starting at location 0x00_0000, FB_CS1 must begin at
the next byte after FB_CS0 for a 16-Mbyte address space. Then, CSAR0 equals 0x0000,
CSMR0[BAM] equals 0x01FF, CSAR1 equals 0x0200, and CSMR1[BAM] equals 0x00FF.
15–9
Reserved, must be cleared.
8
Write protect. Controls write accesses to the address range in the corresponding CSAR. Attempting to write to the
WP
range of addresses for which CSARn[WP] is set results in a bus error termination of the internal cycle and no external
cycle.
0 Read and write accesses are allowed
1 Only read accesses are allowed
7–1
Reserved, must be cleared.
0
Valid bit. Indicates whether the corresponding CSAR, CSMR, and CSCR contents are valid. Programmed
V
chip-selects do not assert until V bit is set (except for FB_CS0, which acts as the global chip-select). Reset clears
each CSMRn[V].
Note: At reset, no chip-select other than FB_CS0 can be used until the CSMR0[V] is set. Afterward, FB_CS[5:0]
functions as programmed.
0 Chip-select invalid
1 Chip-select valid
17.3.3
Chip-Select Control Registers (CSCR0 – CSCR5)
Each CSCRn controls the auto-acknowledge, address setup and hold times, port size, burst capability, and
number of wait states. To support the global chip-select, FB_CS0, the CSCR0 reset values differ from the
17-6
Table 17-4. CSMRn Field Descriptions
Description
n
; n = (number of bits set in respective CSMR[BAM]) + 16.
MCF5329 Reference Manual, Rev 3
Freescale Semiconductor
Advertisement
Table of Contents
