Freescale Semiconductor MCF5329 Reference Manual page 586

FlexCAN
2. ID word
3. Control/status word to mark the Rx MB as active and empty (CODE = 0100)
The first and last steps are mandatory.
The first write to the control/status word is important in case there was a pending reception or transmission.
The write operation immediately deactivates the MB, removing it from any currently ongoing arbitration
or matching process, giving time for the CPU to program the rest of the MB. After the MB is activated in
the third step, it is able to receive CAN frames that match the programmed ID. At the end of a successful
reception, the value of the free running timer (TIMER) is written into the time stamp field, the received
ID, data (8 bytes at most) and length fields are stored, the CODE field in the control and status word is
updated (see Table 23-12), and a status flag is set in the IFLAG register and an interrupt is generated if
allowed by the corresponding IMASK bit.
The CPU should read a receive frame from its MB by reading the following:
1. Control/status word (mandatory—activates internal lock for this buffer)
2. ID (optional—needed only if a mask was used)
3. Data field words
4. Free-running timer (Releases internal lock —optional)
Upon reading the control and status word, if the BUSY bit is set in the CODE field, then the CPU should
defer the access to the MB until this bit is negated. Reading the free running timer is not mandatory. If not
executed the MB remains locked, unless the CPU reads the C/S word of another MB. Only a single MB is
locked at a time. The only mandatory CPU read operation is the one on the control and status word to
assure data coherency.
The CPU should synchronize to frame reception by an IFLAG bit for the specific MB (see
"Interrupt Flag Register
the CODE field does not work because after a frame was received and the CPU services the MB (by
reading the C/S word followed by unlocking the MB), the CODE field does not return to EMPTY. It
remains FULL, as explained in
C/S word to force an EMPTY code after reading the MB, the MB is actually deactivated from any currently
ongoing matching process. As a result, a newly received frame matching the ID of that MB may be lost.
In summary, never do polling by directly reading the C/S word of the MBs. Instead, read the IFLAG
register.
The received identifier field is always stored in the matching MB, thus the contents of the ID field in an
MB may change if the match was due to masking.
23.3.13.1 Self-Received Frames
Self-received frames are frames that are sent by the FlexCAN and received by itself. The FlexCAN sends
a frame externally through the physical layer onto the CAN bus. If the ID of the frame matches the ID of
the FlexCAN MB, the frame is received by the FlexCAN. Such a frame is a self-received frame. FlexCAN
does not receive frames transmitted by itself if another device on the CAN bus has an ID that matches the
FlexCAN Rx MB ID.
23-22
(IFLAG)"), and not by the control/status word CODE field for that MB. Polling
Table 23-12. If the CPU tries to workaround this behavior by writing to the
MCF5329 Reference Manual, Rev 3
NOTE
Section 23.3.8,
Freescale Semiconductor