Emac Instruction Execution Times - Freescale Semiconductor MCF5329 Reference Manual

Devices supported: mcf5327; mcf5328; mcf53281; mcf5329
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Table 3-16. Miscellaneous Instruction Execution Times (continued)
Opcode
<EA>
MOVE.W
<ea>,SR
7(0/0)
MOVEC
Ry,Rc
9(0/1)
MOVEM.L
<ea>,and
list
MOVEM.L
and
list,<ea>
NOP
3(0/0)
PEA
<ea>
PULSE
1(0/0)
STOP
#imm
TRAP
#imm
TPF
1(0/0)
TPF.W
1(0/0)
TPF.L
1(0/0)
UNLK
Ax
2(1/0)
WDDATA
<ea>
WDEBUG
<ea>
1
The n is the number of registers moved by the MOVEM opcode.
2
If a MOVE.W #imm,SR instruction is executed and imm[13] equals 1, the execution time is 1(0/0).
3
The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.
4
PEA execution times are the same for (d16,PC).
5
PEA execution times are the same for (d8,PC,Xn*SF).
3.3.5.6

EMAC Instruction Execution Times

Opcode
MAC.L
Ry, Rx, Raccx
MAC.L
Ry, Rx, <ea>, Rw, Raccx
MAC.W
Ry, Rx, Raccx
MAC.W
Ry, Rx, <ea>, Rw, Raccx
MOVE.L
<ea>y, Raccx
MOVE.L
Raccy,Raccx
MOVE.L
<ea>y, MACSR
3-28
Rn
(An)
(An)+
1+n(n/0)
1+n(0/n)
2(0/1)
3(1/0)
3(1/0)
5(2/0)
Table 3-17. EMAC Instruction Execution Times
<EA>
Rn
(An)
1(0/0)
3(1/0)
1(0/0)
3(1/0)
1(0/0)
1(0/0)
5(0/0)
MCF5329 Reference Manual, Rev 3
Effective Address
-(An)
(d16,An) (d8,An,Xn*SF)
1+n(n/0)
1+n(0/n)
4
2(0/1)
3(0/1)
3(1/0)
3(1/0)
4(1/0)
5(2/0)
Effective Address
(d8,An,
(An)+
-(An)
(d16,An)
Xn*SF)
1
3(1/0)
3(1/0)
3(1/0)
1
3(1/0)
3(1/0)
3(1/0)
xxx.wl
#xxx
2
7(0/0)
5
2(0/1)
3
3(0/0)
15(1/2)
3(1/0)
xxx.wl
#xxx
1(0/0)
5(0/0)
Freescale Semiconductor

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