Emac Instruction Execution Times - Freescale Semiconductor MCF5329 Reference Manual

Command
Load Accumulator move.l {Ry,#imm},ACCext23 Loads the accumulator 2,3 extension bytes with a 32-bit
Extensions 23
Store Accumulator
move.l ACCext01,Rx
Extensions 01
Store Accumulator
move.l ACCext23,Rx
Extensions 23
4.3.3

EMAC Instruction Execution Times

The instruction execution times for the EMAC can be found in
Execution Times".
The EMAC execution pipeline overlaps the AGEX stage of the OEP (the first stage of the EMAC pipeline
is the last stage of the basic OEP). EMAC units are designed for sustained, fully-pipelined operation on
accumulator load, copy, and multiply-accumulate instructions. However, instructions that store contents
of the multiply-accumulate programming model can generate OEP stalls that expose the EMAC execution
pipeline depth:
mac.w Ry, Rx, Acc0
move.l Acc0, Rz
The MOVE.L instruction that stores the accumulator to an integer register (Rz) stalls until the
program-visible copy of the accumulator is available.
DSOC
AGEX
EMAC EX1
EMAC EX2
EMAC EX3
EMAC EX4
Accumulator 0
In Figure 4-9, the OEP stalls the store-accumulator instruction for three cycles: the EMAC pipleline depth
minus 1. The minus 1 factor is needed because the OEP and EMAC pipelines overlap by a cycle, the
AGEX stage. As the store-accumulator instruction reaches the AGEX stage where the operation is
performed, the recently updated accumulator 0 value is available.
Freescale Semiconductor
Table 4-8. EMAC Instruction Summary (continued)
Mnemonic
Three-cycle
regBusy stall
mac move
mac
mac
mac
Figure 4-9. EMAC-Specific OEP Sequence Stall
MCF5329 Reference Manual, Rev 3
Enhanced Multiply-Accumulate Unit (EMAC)
Description
operand
Writes the contents of accumulator 0,1 extension bytes into a
CPU register
Writes the contents of accumulator 2,3 extension bytes into a
CPU register
Section 3.3.5.6, "EMAC Instruction
Figure 4-9 shows EMAC timing.
move
mac
mac
old
move
move
new
4-13