Freescale Semiconductor MCF5329 Reference Manual page 44

Overview
– 0–8 bytes data length
– Programmable bit rate up to 1 Mbit/sec
— 16 flexible Message Buffers (MBs) of 0–8 bytes data length each, configurable as Rx or Tx, all
supporting standard and extended messages
— Listen-only mode capability
— Content-related addressing
— Three programmable mask registers: global (for MBs 0-13), special for MB14 and special for
MB15
— Programmable transmit-first scheme: lowest ID or lowest buffer number
— Time stamp based on 16-bit free-running timer
— Global network time, synchronized by a specific message
• Three universal asynchronous receiver transmitters (UARTs)
— 16-bit divider for clock generation
— Interrupt control logic
— DMA support with separate transmit and receive requests
— Data formats can be 5, 6, 7, or 8 bits with even, odd, or no parity
— Up to two stop bits in 1/16 increments
— Error-detection capabilities
— Flow control support includes request-to-send (UnRTS) and clear-to-send (UnCTS) lines
2
• I C module
— Interchip bus interface for EEPROMs, A/D converters, and keypads
— Fully compatible with industry-standard I
— Master or slave modes support multiple masters
— Automatic interrupt generation with programmable level
• Queued serial peripheral interface (QSPI)
— Full-duplex, three-wire synchronous transfers
— Up to three chip selects available
— Master mode operation only with programmable master bit rates
— Up to 16 pre-programmed transfers
• Pulse width modulation (PWM) module
— Four independent PWM channels with programmable period and duty cycle
— Dedicated counter for each PWM channel
— Programmable PWM enable/disable for each channel
— Software selection of PWM duty pulse polarity for each channel
• Real time clock
— Full clock - days, hours, minutes, seconds
— Minute countdown timer with interrupt
— Programmable daily alarm with interrupt
1-6
2 C bus
MCF5329 Reference Manual, Rev 3
Freescale Semiconductor