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Watchdog Timer Module
27.2.2
Watchdog Modulus Register (WMR)
The WMR register determines the timer modulus reload value.
Address: 0xFC09_8002
15
14
13
R
W
Reset
1
1
Field
15–0
Watchdog modulus. Contains the modulus that is reloaded into the watchdog counter by a service sequence. After
WM
written, the WM[15:0] field is not affected by further writes except in halted mode. Writing to WMR immediately loads
the new modulus value into the watchdog counter. The new value is also used at the next and all subsequent reloads.
Reading WMR returns the value in the modulus register.
Reset initializes the WM[15:0] field to 0xFFFF.
Note: The prescaler counter is reset anytime a new value is loaded into the watchdog counter and also during reset.
27.2.3
Watchdog Count Register (WCNTR)
The WCNTR register provides visibility to the watchdog counter value. The timeout value for the
watchdog timer is determined from the following equation:
Thus, the maximum timeout is 4096 × 2
Address: 0xFC09_8004
15
14
13
R
W
Reset
1
1
Field
15–0
Watchdog count field. Reflects the current value in the watchdog counter. Reading the 16-bit WCNTR with two 8-bit
WC
reads is not guaranteed to return a coherent value. Writing to WCNTR has no effect, and write cycles are terminated
normally.
27-4
12
11
10
1
1
1
1
Figure 27-3. Watchdog Modulus Register (WMR)
Table 27-4. WMR Field Descriptions
4096
--------------------------------------- -
WDT timeout
=
16
/ f
sys/3
12
11
10
1
1
1
1
Figure 27-4. Watchdog Count Register (WCNTR)
Table 27-5. WCNTR Field Descriptions
MCF5329 Reference Manual, Rev 3
9
8
7
6
5
WM
1
1
1
1
1
Description
×
WCNTR
f
sys 3 ⁄
= 3.36 seconds at 80 MHz internal bus frequency.
9
8
7
6
5
WC
1
1
1
1
1
Description
Access: Supervisor
read/write
4
3
2
1
0
1
1
1
1
1
Eqn. 27-1
Access: User read/write
4
3
2
1
0
1
1
1
1
1
Freescale Semiconductor
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