Introduction - Freescale Semiconductor MCF5329 Reference Manual

Chapter 8
Power Management
8.1

Introduction

This chapter explains the low-power operation of the device.
8.1.1 Features
The following features support low-power operation:
• Four modes of operation: run, wait, doze, and stop
• Ability to shut down most peripherals independently
• Ability to shut down clocks to most peripherals independently
• Ability to run the device in low-frequency limp mode
• Ability to shut down the external FB_CLK pin
8.2 Memory Map/Register Definition
The power management programming model consists of registers from the SCM and CCM memory space,
as shown below:
Address
0xFC04_0013 Wakeup Control Register (WCR)
0xFC04_002C Peripheral Power Management Set Register 0 (PPMSR0)
0xFC04_002D Peripheral Power Management Clear Register 0 (PPMCR0)
0xFC04_002E Peripheral Power Management Set Register 1 (PPMSR1)
0xFC04_002F Peripheral Power Management Clear Register 1 (PPMCR1)
0xFC04_0030 Peripheral Power Management High Register 0 (PPMHR0)
0xFC04_0034 Peripheral Power Management Low Register 0 (PPMLR0)
0xFC04_0038 Peripheral Power Management High Register 1 (PPMHR1)
0xFC0A_0007 Low-Power Control Register (LPCR)
Freescale Semiconductor
Table 8-1. Power Management Memory Map
Register
Supervisor Access Only Registers
MCF5329 Reference Manual, Rev 3
Width
Access Reset Value
(bits)
1
8 R/W 0x00
8 W 0x00
8 W 0x00
8 W 0x00
8 W 0x00
32 R/W 0x0000_0000
32 R/W 0x0000_0000
32 R/W 0x0000_0000
8 R/W 0x00
Section/Page
8.2.1/8-2
8.2.2/8-3
8.2.3/8-4
8.2.2/8-3
8.2.3/8-4
8.2.4/8-4
8.2.4/8-4
8.2.4/8-4
8.2.5/8-7
8-1