Freescale Semiconductor MCF5329 Reference Manual page 730

UART Modules
Address: 0xFC06_0008 (UCR0)
0xFC06_4008 (UCR1)
0xFC06_8008 (UCR2)
7
R
W 0
Reset: 0
Table 31-7 describes UCRn fields and commands. Examples in
Operating Modes," show how these commands are used.
Field
7 Reserved, must be cleared.
6–4 MISC Field (this field selects a single command)
MISC
Command
000
NO COMMAND
001
RESET MODE
REGISTER POINTER
010
RESET RECEIVER
011
RESET
TRANSMITTER
100
RESET ERROR
STATUS
101
RESET BREAK
CHANGE INTERRUPT
110
START BREAK
111
STOP BREAK
31-10
6 5 4
MISC
0 0 0
Figure 31-7. UART Command Registers (UCRn)
Table 31-7. UCRn Field Descriptions
Description
—
Causes the mode register pointer to point to UMR1n.
Immediately disables the receiver, clears USRn[FFULL,RXRDY], and reinitializes
the receiver FIFO pointer. No other registers are altered. Because it places the
receiver in a known state, use this command instead of
reconfiguring the receiver.
Immediately disables the transmitter and clears USRn[TXEMP,TXRDY]. No other
registers are altered. Because it places the transmitter in a known state, use this
command instead of
TRANSMITTER DISABLE
Clears USRn[RB,FE,PE,OE]. Also used in block mode to clear all error bits after
a data block is received.
– Clears the delta break bit, UISRn[DB].
Forces UnTXD low. If the transmitter is empty, break may be delayed up to one bit
time. If the transmitter is active, break starts when character transmission
completes. Break is delayed until any character in the transmitter shift register is
sent. Any character in the transmitter holding register is sent after the break.
Transmitter must be enabled for the command to be accepted. This command
ignores the state of UnCTS.
Causes UnTXD to go high (mark) within two bit times. Any characters in the
transmit buffer are sent.
MCF5329 Reference Manual, Rev 3
Access: User write-only
3 2 1
TC
0 0 0
Section 31.4.2, "Transmitter and Receiver
Description
RECEIVER DISABLE
when reconfiguring the transmitter.
Freescale Semiconductor
0
RC
0
when