Universal Serial Bus (Usb) Signals; Pulse Width Modulation (Pwm) Module Signals - Freescale Semiconductor MCF5329 Reference Manual

Signal Descriptions
Signal Name
Serial Clock
Serial Frame Sync
Serial Receive Data
Serial Transmit Data
2.3.14

Universal Serial Bus (USB) Signals

The following table describes the signals for the USB module.
Signal Name
On-the-Go D- USBOTG_DM
On-the-Go D+ USBOTG_DP
On-the-Go Enable USBOTG_PU_EN
Host D- USBHOST_DM
Host D+ USBHOST_DP
Host VBUS Enable USBHOST_VBUS_EN
Host VBUS over-current USBHOST_VBUS_OC
ULPI Data Bus ULPI_DATA[7:0]
ULPI Data Bus ULPI_DIR
Direction
ULPI Stop Data ULPI_STP
ULPI Next Data ULPI_NXT
ULPI On-Chip Clock ULPI_CLK
USB Off-Chip Clock USBCLKIN
2.3.15

Pulse Width Modulation (PWM) Module Signals

The following table describes the signals for the PWM module.
2-16
Table 2-15. SSI Module Signals
Abbreviation
SSI_CLK Used by the receive and transmit blocks. In gated clock mode,
SSI_CLK is only valid during the transmission of data, otherwise it is
pulled to an inactive state.
SSI_FS Used by transmitter/receiver to synchronize the transfer of data. In
gated clock mode, this signal is not used. When configured as an
input, the external device should drive SSI_FS during the riding edge
of SSI_CLK.
SSI_RXD Receives data into the receive data shift register
SSI_TXD Transmits data from the serial transmit shift register.
Table 2-16. USB Module Signals
Abbreviation
D- output of the dual-speed transceiver for the On-the-Go module.
D+ output of the dual-speed transceiver for the On-the-Go module.
Enables an external pull-up on the USBOTG_DP line. This signal is
controlled by the UOCSR[BVLD] bit.
D- output of the dual-speed transceiver for the USB Host module.
D+ output of the dual-speed transceiver for the USB Host module.
Enables off-chip VBUS charge pump
Indicates to the processor that a short has occurred on the USB
data bus.
Data bus for the ULPI interface, which is synchronous to
USBCLKIN/ULPI_CLK.
Indicates direction of the ULPI data bus., which is synchronous to
USBCLKIN/ULPI_CLK
Synchronous to USBCLKIN
Synchronous to USBCLKIN
60MHz clock which is generated on-chip
See Section 2.3.2, "PLL and Clock Signals"
MCF5329 Reference Manual, Rev 3
Function
Function
Freescale Semiconductor
I/O
I/O
I/O
I
O
I/O
O
O
O
O
O
O
I
I/O
I
O
I