ST STM32F40 Series Reference Manual page 1018

RM0090
Table 170. Ethernet register map and reset values (continued)
Offset Register
ETH_MACDB
GR
0x34
Reset value
ETH_MACSR
0x38
Reset value
ETH_MACIM
R
0x3C
Reset value
ETH_MACA0
HR
0x40
Reset value 1 0
ETH_MACA0
LR
0x44
Reset value 1 1
ETH_MACA1
AE SA
HR
0x48
Reset value 0 0
ETH_MACA1
LR
0x4C
Reset value 1 1
ETH_MACA2
AE SA
HR
0x50
Reset value 0 0
ETH_MACA2
LR
0x54
Reset value 1 1
ETH_MACA3
AE SA
HR
0x58
Reset value 0 0
ETH_MACA3
LR
0x5C
Reset value 1 1
ETH_MMCCR
0x100
Reset value
ETH_MMCRI
R
0x104
Reset value
ETH_MMCTI
0x108 R
Reset value
ETH_MMCRI
MR
0x10C
Reset value
ETH_MMCTI
MR
0x110
Reset value
ETH_MMCTG
FSCCR
0x14C
Reset value 0 0
ETH_MMCTG
FMSCCR
0x150
Reset value 0 0
Ethernet (ETH): media access control (MAC) with DMA controller
0 0 0
Reserved
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
MBC[6:0]
0 0 0 0 0 0
1 1 1 1 1 1 1 1
MBC
0 0 0 0 0 0
1 1 1 1 1 1 1 1
MBC
0 0 0 0 0 0
1 1 1 1 1 1 1 1
Reserved
Reserved
Reserved
Reserved
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Doc ID 018909 Rev 4
Reserved
0 0 0 0 0 0
Reserved
Reserved
0 0 0 0 0 0 1 1
MACA0L
1 1 1 1 1 1 1 1
Reserved
1 1
MACA1L
1 1 1 1 1 1 1 1
Reserved
1 1
MACA2L
1 1 1 1 1 1 1 1
Reserved
1 1
MACA3L
1 1 1 1 1 1 1 1
Reserved
0
Reserved
0 0 0
0
Reserved
0 0 0
TGFSCC
0 0 0 0 0 0 0 0
TGFMSCC
0 0 0 0 0 0 0 0
0 0 0
0 0
Reserved
0
MACA0H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
MACA1H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
MACA2H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
MACA3H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
Reserved
0
Reserved
Reserved
0
Reserved
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0
Reserved
0 0 0
Reserved
0
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
0 0 0 0 0 0
Reserved
0
Reserved
0
0 0 0 0 0 0
0 0 0 0 0 0
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