ST STM32F40 Series Reference Manual page 1020

RM0090
Table 170. Ethernet register map and reset values (continued)
Offset Register
ETH_DMAOM
R
0x1018 Reserved
Reset value
ETH_DMAIE
R
0x101C
Reset value
ETH_DMAMF
BOCR
0x1020 Reserved
Reset value
ETH_DMARS
WTR
0x1024
Reset value
ETH_DMACH
TDR
0x1048
Reset value 0 0
ETH_DMACH
RDR
0x104C
Reset value 0 0
ETH_DMACH
TBAR
0x1050
Reset value 0 0
ETH_DMACH
RBAR
0x1054
Reset value 0 0
Refer to
Ethernet (ETH): media access control (MAC) with DMA controller
0 0 0
Reserved
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Table 2 on page 52 for the register boundary addresses.
Doc ID 018909 Rev 4
Reserved
0 0 0 0 0
0 0 0
0 0 0 0 0 0 0 0
Reserved
HTDAP
0 0 0 0 0 0 0 0
HRDAP
0 0 0 0 0 0 0 0
HTBAP
0 0 0 0 0 0 0 0
HRBAP
0 0 0 0 0 0 0 0
Reserved
0 0 0
0 0 0 0 0 0
MFC
0 0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
RSWTC
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
1020/1422