Ethernet Register Maps; Table 170. Ethernet Register Map And Reset Values - ST STM32F40 Series Reference Manual

Ethernet (ETH): media access control (MAC) with DMA controller
Ethernet DMA current host receive buffer address register
(ETH_DMACHRBAR)
Address offset: 0x1054
Reset value: 0x0000 0000
The current host receive buffer address register points to the current receive buffer address
being read by the DMA.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
r r r r r r r
Bits 31:0 HRBAP: Host receive buffer address pointer
29.8.5

Ethernet register maps

Table 170

Table 170. Ethernet register map and reset values

Offset Register
ETH_MACCR
0x00
Reset value
ETH_MACFF
RA
R
0x04
Reset value 0
ETH_MACHT
HR
0x08
Reset value 0 0
ETH_MACHT
LR
0x0C
Reset value 0 0
ETH_MACMII
AR
0x10
Reset value
ETH_MACMII
DR
0x14
Reset value
ETH_MACFC
R
0x18
Reset value 0 0
ETH_MACVL
ANTR
0x1C
Reset value
ETH_MACRW
UFFR
0x28
Reset value
ETH_MACPM
0x2C
TCSR
Reset value 0
1017/1422
r r r r r r
Cleared on reset. Pointer updated by DMA during operation.
gives the ETH register map and reset values.
Reserved
0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Reserved
Reserved
PT
0 0 0 0 0 0 0 0
Reserved
Frame filter reg0\Frame filter reg1\Frame filter reg2\Frame filter reg3\Frame filter reg4\...\Frame filter reg7
Doc ID 018909 Rev 4
HRBAP
r r r r r r r
IFG
0 0 0 0 0
Reserved
HTH[31:0]
0 0 0 0 0 0 0 0
HTL[31:0]
0 0 0 0 0 0 0 0
0 0
0 0
0 0 0 0 0 0
0 0 0
0
Reserved
9 8 7 6 5
r r r r r r r
0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
PA MR
0 0 0 0 0 0 0 0
MD
0 0 0 0 0 0 0 0
Reserved
0
VLANTI
0 0 0 0 0 0 0 0
0 0
RM0090
4 3 2 1 0
r r r r r
0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
M M
W B
0 0 0 0 0 0
0 0 0 0 0 0
PLT
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0