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6.2 Register Descriptions
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6.2.1 Bus Width Control Register (ABWCR)
ABWCR is an 8-bit readable/writable register that selects 8-bit or 16-bit access for each area.
Bit
7
ABW7
1
Mode 1, 3, 5, 6
Initial
value
0
Mode 2, 4, 7
Read/Write
R/W
When ABWCR contains H'FF (selecting 8-bit access for all areas), the chip operates in 8-bit bus
mode: the upper data bus (D
bit is cleared to 0 in ABWCR, the chip operates in 16-bit bus mode with a 16-bit data bus (D
D
). In modes 1, 3, 5, and 6 ABWCR is initialized to H'FF by a reset and in hardware standby
0
mode. In modes 2, 4, and 7 ABWCR is initialized to H'00 by a reset and in hardware standby
mode. ABWCR is not initialized in software standby mode.
Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select 8-bit access
or 16-bit access to the corresponding address areas.
Bits 7 to 0
ABW7 to ABW0
Description
0
Areas 7 to 0 are 16-bit access areas
1
Areas 7 to 0 are 8-bit access areas
ABWCR specifies the bus width of external memory areas. The bus width of on-chip memory and
registers is fixed and does not depend on ABWCR settings. These settings are therefore
meaningless in single-chip mode (mode 7).
6
5
ABW6
ABW5
ABW4
1
1
0
0
R/W
R/W
R/W
Bits selecting bus width for each area
to D
) is valid, and port 4 is an input/output port. When at least one
15
8
114
4
3
2
ABW3
ABW2
1
1
1
0
0
0
R/W
R/W
1
0
ABW1
ABW0
1
1
0
0
R/W
R/W
to
15
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