Bus Control Register (Bcr) - Hitachi H8/3006 Hardware Manual

Bit 5—Address 21 Enable (A21E): Enables PA
Writing 0 in this bit enables A
and PA has its ordinary port functions.
6
Bit 5
A21E Description
0 PA
1 PA
Bit 4—Address 20 Enable (A20E): Initial value of this bit varies depending on the mode. This
bit can not be modified.
Bit 4
A20E Description
0 PA
1 PA
Bits 3 to 1—Reserved: These bits cannot be modified and are always read as 1.
Bit 0—Bus Release Enable (BRLE): Enables or disables release of the bus to an external device.
Bit 0
BRLE Description
0 The bus cannot be released to an external device
BREQ and BACK can be used as input/output pins
1 The bus can be released to an external device
6.2.5

Bus Control Register (BCR)

Bit 7
ICIS1
Initial value 1
Read/Write R/W
BCR is an 8-bit readable/writable register that enables or disables idle cycle insertion, selects the
area division unit, and enables or disables WAIT pin input.
BCR is initialized to H'C6 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
116
output from PA
21
is the A address output pin
6 21
is an input/output pin
6
is the A address output pin (Initial value in mode 3 or 4)
7 20
is an input/output pin (Initial value in mode 1 or 2)
7
6 5
ICIS0 BROME BRSTS1 BRSTS0
1 0
R/W R/W
to be used as the A
6
. In modes 1 and 2, this bit cannot be modified
6
4 3
0 0
R/W R/W
address output pin.
21
(Initial value)
(Initial value)
2 1
— RDEA
1 1
— R/W
0
WAITE
0
R/W