Timer Interrupt Status Register A (Tisra) - Hitachi H8/3006 Hardware Manual

Bit 1—PWM Mode 1 (PWM1): Selects whether channel 1 operates normally or in PWM mode.
Bit 1
PWM1 Description
0 Channel 1 operates normally
1 Channel 1 operates in PWM mode
When bit PWM1 is set to 1 to select PWM mode, pin TIOCA
output goes to 1 at compare match with GRA1, and to 0 at compare match with GRB1.
Bit 0—PWM Mode 0 (PWM0): Selects whether channel 0 operates normally or in PWM mode.
Bit 0
PWM0 Description
0 Channel 0 operates normally
1 Channel 0 operates in PWM mode
When bit PWM0 is set to 1 to select PWM mode, pin TIOCA
output goes to 1 at compare match with GRA0, and to 0 at compare match with GRB0.
9.2.4

Timer Interrupt Status Register A (TISRA)

TISRA is an 8-bit readable/writable register that indicates GRA compare match or input capture
and enables or disables general register compare match and input capture interrupt requests.
292
becomes a PWM output pin. The
1
becomes a PWM output pin. The
0
(Initial value)
(Initial value)