Interrupt Control Register (Icr) - Hitachi SH7095 Hardware User Manual

in the range of H'00 (0000000) to H'7F (1111111). H'00 is vector number 0 (the lowest); H'7F is
vector number 127 (the highest). The vector table address is calculated by the following equation.
Vector table address = VBR + (vector number × 4)
A reset initializes a vector number setting register to H'0000. They are not initialized by the
standby mode.
Table 5.7 lists functions for vector number setting registers DIV, DMAC0, and DMAC1. The
vector number for DIV overflow interrupts is set in VCRDIV and the vector numbers for DMAC
transfer-end interrupts are set in VCRDMA0 and VCRDMA1. See sections '9. Direct Memory
Access Controller' and '10. Division Unit' for more details.
Table 5.7 DIV, DMAC0, and DMAC1 Functions
Register
Vector number setting register DIV
Vector number setting register DMAC0
Vector number setting register DMAC1
5.3.8

Interrupt Control Register (ICR)

The ICR is a 16-bit register that sets the input signal detection mode of the external interrupt input
pin NMI and indicates the input signal level to the NMI pin. It also sets the IRL interrupt vector
mode. A reset initializes ICR to H'8000 or H'0000 but the standby mode does not.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Note: When NMI input is high: 1; when NMI input is low: 0
• Bit 15—NMI Input Level (NMIL): Sets the level of the signal input at the NMI pin. This bit
can be read to determine the NMI pin level. This bit cannot be modified.
15 14
NMIL —
0/1* 0
R R
7 6
— —
0 0
R R
Setting Function
Overflow interrupts for divider unit
Channel 0 transfer end interrupt for DMAC
Channel 1 transfer end interrupt for DMAC
13 12 11
— — —
0 0
R R
5 4
— — —
0 0
R R
10
— —
0 0
R R
3 2
— —
0 0
R R
9 8
NMIE
0 0
R R/W
1 0
VECMD
0 0
R R/W
Hitachi 83