A/D Control Register (Adcr) - Hitachi H8/3006 Hardware Manual

15.2.3

A/D Control Register (ADCR)

Bit
TRGE
Initial value
Read/Write R/W
Trigger enable
Enables or disables starting of A/D conversion
by an external trigger or 8-bit timer compare match
ADCR is an 8-bit readable/writable register that enables or disables starting of A/D conversion by
external trigger input or an 8-bit timer compare match signal. ADCR is initialized to H'7E by a
reset and in standby mode.
Bit 7—Trigger Enable (TRGE): Enables or disables starting of A/D conversion by an external
trigger or 8-bit timer compare match.
Bit 7
TRGE Description
0 Starting of A/D conversion by an external trigger or 8-bit timer
compare match is disabled
1 A/D conversion is started at the falling edge of the external trigger
signal (ADTRG) or by an 8-bit timer compare match
External trigger pin and 8-bit timer selection are performed by the 8-bit timer. For details, see
section 10, 8-Bit Timers.
Bits 6 to 1—Reserved: These bits cannot be modified and are always read as 1.
Bit 0—Reserved: This bit can be read or written, but should not be set to 1.
7 6 5
— —
0 1 1
— —
4 3 2
— — —
1 1 1
— — —
Reserved bits
1 0
— —
1 0
— R/W
(Initial value)
523