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15.2.2 A/D Control/Status Register (ADCSR)
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Bit
7
ADF
Initial value
0
Read/Write
R/(W)
*
A/D end flag
Indicates end of A/D conversion
Note:
Only 0 can be written, to clear the flag.
*
ADCSR is an 8-bit readable/writable register that selects the mode and controls the A/D converter.
ADCSR is initialized to H'00 by a reset and in standby mode.
6
5
ADIE
ADST
SCAN
0
0
R/W
R/W
R/W
Scan mode
Selects single mode or scan mode
A/D start
Starts or stops A/D conversion
A/D interrupt enable
Enables and disables A/D end interrupts
528
4
3
2
CKS
CH2
0
0
0
R/W
R/W
Channel select 2 to 0
These bits select analog
input channels
Clock select
Selects the A/D conversion time
1
0
CH1
CH0
0
0
R/W
R/W
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