Pin Configuration; Register Configuration; System Control Register (Syscr) - Hitachi H8S/2338 Series Hardware Manual

3.1.3

Pin Configuration

Table 3-1 summarizes the pins of the interrupt controller.
Table 3-1 Interrupt Controller Pins
Name
Nonmaskable interrupt
External interrupt
requests 7 to 0
3.1.4

Register Configuration

Table 3-2 summarizes the registers of the interrupt controller.
Table 3-2 Interrupt Controller Registers
Name
System control register
IRQ sense control register H
IRQ sense control register L
IRQ enable register
IRQ status register
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
Interrupt priority register D
Interrupt priority register E
Interrupt priority register F
Interrupt priority register G
Interrupt priority register H
Interrupt priority register I
Interrupt priority register J
Interrupt priority register K
Notes: 1. Lower 16 bits of the address.
2. Can only be written with 0 for flag clearing.
Symbol I/O
NMI Input
IRQ7 to IRQ0 Input
Abbreviation
SYSCR
ISCRH
ISCRL
IER
ISR
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
IPRI
IPRJ
IPRK
Function
Nonmaskable external interrupt; rising or
falling edge can be selected
Maskable external interrupts; rising, falling, or
both edges, or level sensing, can be selected
R/W Initial Value
R/W H'01
R/W H'00
R/W H'00
R/W H'00
2
R/(W)* H'00
R/W H'77
R/W H'77
R/W H'77
R/W H'77
R/W H'77
R/W H'77
R/W H'77
R/W H'77
R/W H'77
R/W H'77
R/W H'77
1
Address*
H'FF39
H'FF2C
H'FF2D
H'FF2E
H'FF2F
H'FEC4
H'FEC5
H'FEC6
H'FEC7
H'FEC8
H'FEC9
H'FECA
H'FECB
H'FECC
H'FECD
H'FECE
19