Sc Port Control Register (Scpcr)/Sc Port Data Register (Scpdr) - Hitachi SH7709S Hardware Manual

14.2.8

SC Port Control Register (SCPCR)/SC Port Data Register (SCPDR)

The SC port control register (SCPCR) and SC port data register (SCPDR) control I/O and data for
the port pins multiplexed with the serial communication interface (SCI) pins.
SCPCR settings are used to perform I/O control, to enable data written in SCPDR to be output to
the TxD pin, and input data to be read from the RxD pin, and to control serial
transmission/reception breaks.
It is also possible to read data on the SCK pin, and write output data.
SCPCR
15 14
Bit:
SCP7 SCP7 SCP6
MD1 MD0
1 0
Initial value:
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
R/W:
SCPDR
Bit:
SCP7DT SCP6DT SCP5DT SCP4DT SCP3DT SCP2DT SCP1DT SCP0DT
Initial value:
R/W:
SCI pin I/O and data control are performed by bits 3–0 of SCPCR and bits 1 and 0 of SCPDR.
SCPCR Bits 3 and 2—Serial Clock Port I/O (SCP1MD1, SCP1MD0): Specify serial port SCK
pin I/O. When the SCK pin is actually used as a port I/O pin, clear the C/A bit in SCSMR and bits
CKE1 and CKE0 in SCSCR to 0.
Bit 3: Bit 2:
SCP1MD1 SCP1MD0
0 0
0 1
1 0
1 1
13 12 11 10 9
SCP6 SCP5 SCP5 SCP4
MD1 MD0 MD1 MD0 MD1
1 0 1 0 0
7 6 5
0 0 0
R R/W R/W
Description
SCP1DT bit value is not output to SCK pin
SCP1DT bit value is output to SCK pin
SCK pin value is read from SCP1DT bit
8 7 6 5
SCP4 SCP3 SCP3 SCP2 SCP2
MD0 MD1 MD0 MD1 MD0
0 1 0 0
4 3 2
0 0 0
R/W R/W R/W
4 3 2 1 0
SCP1 SCP1 SCP0 SCP0
MD1 MD0 MD1 MD0
0 1 0 0 0
1 0
0 0
R/W R/W
(Initial values: 1 and 0)
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