Timer Synchro Register (Tsnc) - Hitachi H8/3062 Hardware Manual

Bit 1—Counter Start 1 (STR1): Starts and stops timer counter 1 (16TCNT1).
Bit 1
STR1 Description
0 16TCNT1 is halted
1 16TCNT1 is counting
Bit 0—Counter Start 0 (STR0): Starts and stops timer counter 0 (16TCNT0).
Bit 0
STR0 Description
0 16TCNT0 is halted
1 16TCNT0 is counting
8.2.2

Timer Synchro Register (TSNC)

TSNC is an 8-bit readable/writable register that selects whether channels 0 to 2 operate
independently or synchronously. Channels are synchronized by setting the corresponding bits to 1.
Bit
—
Initial value
Read/Write —
TSNC is initialized to H'F8 by a reset and in standby mode.
Bits 7 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bit 2—Timer Sync 2 (SYNC2): Selects whether channel 2 operates independently or
synchronously.
Bit 2
SYNC2 Description
0 Channel 2's timer counter (16TCNT2) operates independently
16TCNT2 is preset and cleared independently of other channels
1 Channel 2 operates synchronously
16TCNT2 can be synchronously preset and cleared
7 6 5
— —
1 1 1
— —
Reserved bits
4 3 2
— — SYNC2
1 1 0
— — R/W
Timer sync 2 to 0
These bits synchronize
channels 2 to 0
(Initial value)
(Initial value)
1 0
SYNC1 SYNC0
0 0
R/W R/W
(Initial value)
229