Contention Between Counter Clearing By Input Capture And Counter Increment - Hitachi H8/3006 Hardware Manual

10.7.5

Contention between Counter Clearing by Input Capture and Counter Increment

If an input capture signal and counter increment signal occur simultaneously, counter clearing by
the input capture signal takes priority and the counter is not incremented. The value before the
counter is cleared is transferred to TCORB. Figure 10.22 shows the timing in this case.
T T T
1 2 3
φ
Input capture signal
Counter clear signal
8TCNT internal clock
8TCNT N H'00
TCORB N
X
Figure 10.22 Contention between Counter Clearing by Input Capture and Counter
Increment
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