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Notes: 1. Two modes: program-verify and erase-verify.
2. Excluding a RAM area overlapping flash memory.
3. All blocks are unerasable and block-by-block specification is not possible.
4. For details see section 15.11, Notes on Flash Memory Programming and Erasing.
5. See section 4.2.2, Reset Sequence, and section 15.11, Notes on Flash Memory
Programming and Erasing. The H8/3022F requires a minimum of 20 system clock
cycles for a reset during operation.
6. It is possible to perform a program-verify operation on the 128 bytes being
programmed, or an erase-verify operation on the block being erased.
15.8.2
Software Protection
Software protection can be implemented by setting the erase block register 1 (EBR1), erase block
register 2 (EBR2), and the RAMS bit in the RAM emulation register (RAMER). When software
protection is in effect, setting the P or E bit in flash memory control register 1 (FLMCR1), does
not cause a transition to program mode or erase mode. (See table 15-12.)
Table 15-12 Software Protection
Item
Description
•
Block specification
protection
•
•
Emulation
protection
Notes: 1. Two modes: program-verify and erase-verify.
2. When not erasing, clear all EBR1, EBR2 bits to H'00.
3. A RAM area overlapping flash memory can be written to.
4. All blocks are unerasable and block-by-block specification is not possible.
468
Erase protection can be set for individual
blocks by settings in erase block register 1
2
(EBR1)*
and erase block register 2
2
(EBR2)*
. However, programming
protection is disabled.
Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
Setting the RAMS bit to 1 in the RAM
emulation register (RAMER) places all
blocks in the program/erase-protected
state.
Functions
Program Erase
—
No
3
4
No*
No*
1
Verify*
Yes
Yes
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