ST STM32F101 series Reference Manual page 1120

RM0008
Date Revision
02-Jun- 15
2014 (continued)
Table 235. Document revision history (continued)
BxCAN:
Added register access in
Updated Figure 222: Dual CAN block diagram (connectivity
Updated definition of CAN2SB bits in
I2C:
Modified Section 26.3.7: DMA
Updated definition of PE and note related to SWRST bit, moved note related to STOP bit
to the whole register in Section 26.6.1: I2C Control register 1
Updated bit 14 description in
USART:
Introduced Sm (standard mode) and Fm (fast mode) acronyms.
Updated info about the frequency in
Updated Section 27.3.11:
Updated CTSE bitfield description in
ETHERNET
Updated TBAP2 bit description in
DocID13902 Rev 15
Changes
Section 24.9: CAN registers.
Section : CAN filter master register
requests.
Section 26.6.3: I2C Own address register 1
Section 27.1: USART introduction
Smartcard.
Section 27.6.6: Control register 3
Section ·: TDES3: Transmit descriptor
Revision history
devices).
(CAN_FMR).
(I2C_CR1).
(I2C_OAR1).
.
(USART_CR3).
Word3.
1120/1128
1120