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18.5.3 Erase Block Register 2
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Erase block register 2 (EBR2) is an eight-bit register that designates small flash-memory blocks
for programming and erasure. EBR2 is initialized to H'00 by a reset, in the standby modes, when
12 V is applied to V
while the V
PP
in EBR2 is set to 1, the corresponding block is selected and can be programmed and erased.
Figure 18-8 shows a block map.
Bit
7
SB7
*
Initial value
0
*
R/W
R/W
Note: * The initial value is H'00 in modes 5, 6, and 7 (on-chip flash memory enabled). In modes
1, 2, 3, and 4 (on-chip flash memory disabled), this register cannot be modified and is
always read as H'FF.
Bits 7 to 0—Small Block 7 to 0 (SB7 to SB0): These bits select small blocks (SB7 to SB0) to be
programmed and erased.
Bits 7 to 0
SB7 to SB0
Description
0
Block SB7 to SB0 is not selected
1
Block SB7 to SB0 is selected
E bit is 0, and when 12 V is not applied to V
PP
6
5
4
SB6
SB5
SB4
0
0
0
*
*
*
R/W
R/W
R/W
578
3
2
1
SB3
SB2
SB1
0
0
0
*
*
*
R/W
R/W
R/W
. When a bit
PP
0
SB0
0
*
R/W
(Initial value)
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