Figure 6.13 Bus Timing For 16-Bit 2-State Access Space (1) (Even Address Byte Access) - Hitachi H8S/2215 Series Hardware Manual

16-Bit 2-State Access Space: Figures 6.13 to 6.15 show bus timings for a 16-bit 2-state access
space. When a 16-bit access space is accessed, the upper half (D15 to D8) of the data bus is used
for the even address, and the lower half (D7 to D0) for the odd address.
Wait states cannot be inserted.
Read
Write
Note: n = 0 to 7

Figure 6.13 Bus Timing for 16-Bit 2-State Access Space (1) (Even Address Byte Access)

Rev. 3.0, 10/02, page 122 of 686
φ
Address bus
D15 to D8
D7 to D0
D15 to D8
D7 to D0
Bus cycle
T T
1 2
Valid
Invalid
High
Valid
High impedance