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Bit 1—Group 1 Non-Overlap (G1NOV): Selects normal or non-overlapping operation for pulse
output group 1 (pins PO7 to PO4).
Bit 1
G1NOV
Description
0
Normal operation in pulse output group 1 (output values updated at compare match A
in the selected TPU channel)
1
Non-overlapping operation in pulse output group 1 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Bit 0—Group 0 Non-Overlap (G0NOV): Selects normal or non-overlapping operation for pulse
output group 0 (pins PO3 to PO0).
Bit 0
G0NOV
Description
0
Normal operation in pulse output group 0 (output values updated at compare match A
in the selected TPU channel)
1
Non-overlapping operation in pulse output group 0 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
8.2.7
Port 1 Data Direction Register (P1DDR)
Bit
:
P17DDR P16DDR P15DDR P14DDR P13DDR P12DDR P11DDR P10DDR
Initial value :
R/W
:
P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 1.
Port 1 is multiplexed with pins PO15 to PO8. Bits corresponding to pins used for PPG output must
be set to 1. For further information about P1DDR, see the I/O Port section in the reference manual
for the relevant model.
7
6
0
0
W
W
5
4
0
0
W
W
3
2
0
0
W
W
(Initial value)
(Initial value)
1
0
0
0
W
W
333
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