Si Ram Pointer Register (Sirp) - Freescale Semiconductor MPC850 User Manual

Table 20-8. SISTR Field Descriptions (Continued)
Bits Name
1 CROTa Address of the current route of TDMa transmitter.
0 Address 256–383 when SIGMR[RDM] = 01.
1 Address 384–511 when SIGMR[RDM] = 01.
2–7 — Reserved, should be cleared.

20.2.4.6 SI RAM Pointer Register (SIRP)

The SI RAM pointer (SIRP) register, shown in Figure 20-20, indicates the RAM entry
currently being serviced. SIRP gives the real-time status location of the SI inside a TDM
frame—useful for debugging and synchronizing system activity with the TDM's activity.
However, simply reading the status register SISTR is sufficient for most applications.
The user can determine which RAM entry in the SI RAM is in progress, but cannot
determine the status within that entry. For example, if the SIRP indicates an SI RAM entry
is active, but the entry is programmed to select four contiguous 8-bit time slots of a TDM,
it cannot be determined which of the four time slots is in progress. However, SIRP updates
the status as soon as the next SI RAM entry begins processing. The value of SIRP changes
on serial clock transitions. Before acting on the information in this register, perform two
reads to verify the same value is returned.
One of the eight strobes can be connected externally to an interrupt pin to generate an
interrupt on a particular SI RAM entry to start or stop TSA execution.
The pointers in SIRP indicate the SI RAM entry word offset that is in progress.
Bit 0 1
Field — VT2
Reset
R/W
Addr
Bit 16 17
Field — VR2
Reset
R/W
Addr
2 3 4 5
TaPTR2
18 19 20 21
RaPTR2
Figure 20-20. SI RAM Pointer Register (SIRP)
Chapter 20. Serial Interface
Description
6 7 8 9
— VT1
0
R
0XAF0
22 23 24 25
— VR1
0
R
0xAF2
The Time-Slot Assigner (TSA)
10 11 12 13
TaPTR1
26 27 28 29
RaPTR1
14 15
30 31