The Real-Time Clock - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
Table of Contents

Advertisement

Table 10-19 describes TBSCR fields.
Bits
Name
0–7
TBIRQ
Timebase interrupt request. Determines interrupt priority level of the timebase. To specify a certain
level, the appropriate bit should be set.
8
REFA
Reference interrupt status. If set, indicates that a match was detected between the corresponding
reference register (TBREFA for REFA and TBREFB for REFB) and the TBL. REFA and REFB are
9
REFB
cleared by writing ones.
10–11 —
Reserved, should be cleared.
12
REFAE
Reference interrupt enable. If asserted, the timebase generates an interrupt on assertion of REFA
or REFB. Otherwise, the interrupt is disabled.
13
REFBE
14
TBF
Timebase freeze enable
0 The timebase and decrementer are unaffected.
1 The FRZ signal stops the timebase and decrementer.
15
TBE
Timebase enable
0 Disables timebase and decrementer operation.
1 Enables timebase and decrementer operation.

10.10 The Real-Time Clock

The real-time clock is a 45-bit counter, clocked by PITRTCLK, to provide time-of-day to
the operating system and application software. The counter is not affected by HRESET,
SRESET, or PORESET and operates in all low-power modes. It must be initialized by
software. The real-time clock can be programmed to generate a maskable interrupt when
the time value matches the value programmed in the associated alarm register. It can also
be programmed to generate an interrupt once each second. A control and status register is
used to selectively enable or disable functions and report the interrupt source. The real-time
clock registers (RTCSC, RTC, RTSEC, and RTCAL) can be protected (locked) from
accidental writes after PORESET through the use of key registers (RTCSCK, RTCK,
RTSECK, and RTCALK), which are described in Section 10.4.5, "Register Lock
Mechanism." To unlock a register, write the key word 0x55CC_AA33 to the key registers.
Note that the real-time clock will count in seconds only if PITRTCLK is supplied by a
32.768 KHz or 38.4 KHz source.
Table 10-19. TBSCR Field Descriptions
Chapter 10. System Interface Unit
Description
The Real-Time Clock

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mpc850deMpc850dslMpc850sr

Table of Contents