Programming The Usb Host Controller - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
Table of Contents

Advertisement

Programming the USB Host Controller

Table 32-17 describes the USB controller reception errors.
Error
Overrun
If the 16-byte receive FIFO overruns, the previously received byte is overwritten. The controller closes
Error
the buffer and sets both RxBD[OV] and USBER[RXB]. The NAK handshake is sent after the end of the
received packet if the packet was received error-free.
Busy
A frame was received and discarded due to lack of buffers. The controller sets USBER[BSY].
Error
Non
If this error occurs, the controller writes the received data to the buffer, closes the buffer and sets both
Octet-Alig
RxBD[NO] and USBER[RXB].
ned
Packet
CRC
When a CRC error occurs, the controller closes the buffer, and sets both RxBD[CR] and USBER[RXB].
Error
In isochronous mode (USEPn[TM] = 0b11), the USB controller reports a CRC error; however, there are
no handshake packets (ACK) and the transfer continues normally when an error occurs.
In isochronous mode (USEPn[TM] = 0b11), the USB controller reports the CRC error, but does not close
the buffer; that is, the transfer continues normally with no handshake packets (ACK) sent.
32.11 Programming the USB Host Controller
This section describes the implementation of a USB host for
revision B and subsequent revisions of the MPC850. Earlier
revisions support only high-speed (12 Mbps) host operation.
The MPC850 implementation of a USB host uses endpoint 0 to control the host
transmission and reception. The other endpoints are typically not used, unless for testing
purposes (loop-back).
Programming the USB controller to act as host is similar to configuring an endpoint for
function operation. A general outline of how to program the host controller follows. (A
more detailed example can be found in Section 32.11.1, "USB Host Controller
Initialization Example.")
• Set the host bit in the mode register (USBMOD[HOST] = 1) to configure the
controller as a host.
• Set the multi-frame bit in the endpoint 0 configuration register (USEP0[MF] = 1) to
allow SETUP/OUT tokens and DATA0/DATA1 packets to be sent back-to-back.
• Prepare tokens in separate BDs.
• Using software, append the CRC5 as part of the transmitted data because the CPM
does not support automatic CRC5 generation.
• Clock the USB host controller as a high speed function (48-MHz reference clock).
Table 32-17. USB Controller Reception Errors
MPC850 Family User's Manual
Description
NOTE:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mpc850deMpc850dslMpc850sr

Table of Contents