Serial Atm Mode Register (Psmr); General Scc Mode Register (Gsmr) - Freescale Semiconductor MPC850 User Manual

Serial ATM Configuration
42.3 Serial ATM Configuration
This section describes the configuration of registers for serial ATM operation.
42.3.1 RISC Controller Configuration Register (RCCR)
The RCCR[DR1M] bit must be set, and the RCCR[DRQP] field must be programmed to
0b01 to allow a higher priority for SCC transfers.
42.3.2 SCC Configuration for Serial ATM
To enable SCC to operate in serial ATM mode, configure the SCC for transparent operation
(because GSMR_L[MODE] has no explicit ATM option) and clear MRBLR in the SCC's
parameter RAM. If MRBLR is programmed with a non-zero value, the SCC operates in
transparent mode.
Be sure to initialize the ATM parameters and data structures before enabling serial ATM
operation because transfers begin as soon as the SCC is enabled in the GSMR.
The following sections describe the programming of the SCC registers for serial ATM
operation.

42.3.2.1 General SCC Mode Register (GSMR)

To configure SCC as an ATM controller, program GSMR_H[TRX, TTX, CDP, CTSP, CDS,
CTSS] (see Section 21.2.1, "General SCC Mode Register (GSMR)"). When the
initialization sequence has been completed, GMSR_L[ENR, ENT] must be set to enable
receive and transmit functions (see Section 21.4.3, "SCC Initialization").
SCC running serial ATM does not support mixed mode operation (in which the SCC
transmitter is configured for ATM transmissions and the receiver is in transparent mode, or
vice versa).

42.3.2.2 Serial ATM Mode Register (PSMR)

The protocol-specific mode register (PSMR), shown in Figure 42-3, functions as the serial
ATM mode register and controls both the scrambling and the HEC coset functions for the
transmitter and receiver.
BIT 0 1
FIELD
— — SCRAM —
RESET 0 0
OPER R/W R/W R/W
ADDR
Figure 42-3. Serial ATM Mode Register (PSMR)
2 3 4 5
— — —
0 0 0 0
R/W R/W R/W R/W
MPC850 Family User's Manual
6 7 8 9
COSET — — —
0 0 0 0
R/W R/W R/W
10 11 12 13
— — — —
0 0 0 0
R/W R/W R/W R/W
14 15
—
0 0
R/W R/W