Interrupt Queue Mask (Imask) - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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Interrupt Queue Mask (IMASK)

41.3 Interrupt Queue Mask (IMASK)
IMASK is the interrupt mask for both the receive and transmit sides of a channel and is
located in the RCT; see Section 37.2.1, "Receive Connection Table (RCT). Shown in
Figure 41-5, it allows the user to enable or disable interrupt generation. If a bit in IMASK
is cleared, the corresponding event does not cause an entry to be added to the interrupt
queue, and the GINT global interrupt counter is not incremented.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CNG
UN
RXF
BSY
TXB
RXB
Figure 41-5. Interrupt Queue Mask (IMASK)
Note that because the masking is performed in microcode, approximately 40 system clocks
must elapse for a change in IMASK to take effect.
MPC850 Family User's Manual

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