Mmu Tablewalk Base Register (M_Twb); Mmu Current Address Space Id Register (M_Casid) - Freescale Semiconductor MPC850 User Manual

8.8.8 MMU Tablewalk Base Register (M_TWB)

The MMU tablewalk base register (M_TWB), shown in Figure 8-13, contains a pointer to
the level-one table to be used in hardware-assisted tablewalk mode.
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field
Reset
R/W
SPR
Figure 8-13. MMU Tablewalk Base Register (M_TWB)
Table 8-14 describes M_TWB fields.
Bits Name
0–19 L1TB Tablewalk level-one base value
20–29 L1INDX Level-one table index. Ignored on write. Returns MD_EPN[0–9] on read when MD_CTR[TWAM] =
1. Returns MD_EPN[2–11] on read when MD_CTR[TWAM] = 0
30–31 — Reserved. Ignored on write. Returns 0 on read.

8.8.9 MMU Current Address Space ID Register (M_CASID)

The MMU current address space ID register (M_CASID), shown in Figure 8-14, is used to
compare the current EA with the ASID field in the TLB entry when searching for a match.
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field
Reset
R/W
SPR
Figure 8-14. MMU Current Address Space ID Register (M_CASID)
Table 8-15 describes M_CASID fields.
Bits Name
0–27 — Reserved. Ignored on write. Returns 0 on read
28–31 CASID Current address space ID. Compared with ASID field of a TLB entry to qualify a match
L1TB
Table 8-14. M_TWB Field Descriptions
—
Table 8-15. M_CASID Field Descriptions
Chapter 8. Memory Management Unit
L1TB
—
R/W
796
Description
—
R/W
793
Description
Programming Model
L1INDX —
00
CASID