Internal Pull-Up And Pull-Down Resistors - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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Three-state
buffer
Active
pull-up
buffer
Figure 12-4. Three-State Buffers and Active Pull-Up Buffers
Table 12-2 summarizes when active pull-up drivers are enabled as outputs.
Table 12-2. Active Pull-Up Resistors Enabled as Outputs
Signal
TS, BB When the MPC850 is the external bus master throughout the entire bus cycle.
BI
When the MPC850's memory controller responds to the access on the external bus, throughout the entire
bus cycle.
TA
When the MPC850's memory controller responds to the access on the external bus, then:
• For chip selects controlled by a GPCM set for external TA, the MPC850's TA buffer is not enabled as an
output.
• For chip-selects controlled by the GPCM set to terminate in n wait-states, TA is enabled as an output on
cycle (n-1) and driven high, then is driven low on cycle n, terminating the bus transaction. External logic
can drive TA at any point before this, thus terminating the cycle early. [For example, assume the GPCM
is programmed to drive TA after 15 cycles. If external logic drives TA before 14 clocks have elapsed,
then the TA is accepted by the MPC850 as a cycle termination.]
• For UPM-controlled chip selects, the TA buffer is enabled as an output throughout the entire bus cycle.
The purpose of active pull-up buffers is to allow access to zero wait-state logic that drives
a shared signal on the clock cycle immediately following a cycle in which the signal is
driven by the MPC850. In other words, it eliminates the need for a bus turn-around cycle.

12.3 Internal Pull-Up and Pull-Down Resistors

The TMS, TRST, and TDI/DSDI pins have internal pull-up resistors. TDI/DSDI should be
pulled up to VCC to keep it from oscillating when unused.
If RSTCONF is pulled down, during hardware reset (initiated by HRESET or PORESET),
3
1
2
3
1 2
4
Note: Events 1 and 4 can be in quick succession.
Description
Chapter 12. External Signals
Internal Pull-Up and Pull-Down Resistors
1 Drive high on one edge
2 Switch to Hi-Z on later edge
3 Pull-up resistor maintains
logic high state
1 Drive high on one edge
2 Switch to Hi-Z when
threshold voltage
5
(Voh+margin) is reached
3 Pull-up resistor maintains
logic high state
4 Disable buffer as output
5 Pull-up resistor maintains
logic high state; other
driver can drive signal

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