Cpm Interrupt Configuration Register (Cicr) - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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35.5.1 CPM Interrupt Configuration Register (CICR)
The CPM interrupt configuration register (CICR) defines CPM interrupt request levels, the
priority between the USB and SCCs, and the highest priority interrupt.
Bit
0
1
Field
Reset
R/W
Address
Bit
16
17
Field
IRL
Reset
R/W
Add
Figure 35-3. CPM Interrupt Configuration Register (CICR)
CICR bits are described in Table 35-3.
Bits
Name
0–7
Reserved, should be cleared.
1
8–9
SCdP
SCCd priority order. Defines whether USB or SCCs asserts its request in the SCCd priority position.
00 USB asserts its request in the SCCd position.
01 SCC2 asserts its request in the SCCd position.
10 SCC3 asserts its request in the SCCd position.
1
10–11 SCcP
SCCc priority order. Defines whether USB or SCCs asserts its request in the SCCc priority position.
00 USB asserts its request in the SCCc position.
01 SCC2 asserts its request in the SCCc position.
10 SCC3 asserts its request in the SCCc position.
1
12–13 SCbP
SCCb priority order. Defines whether USB or SCCs that asserts its request in the SCCb priority
position.
00 USB asserts its request in the SCCb position.
01 SCC2 asserts its request in the SCCb position.
10 SCC3 asserts its request in the SCCb position.
1
14–15 SCaP
SCCa priority order. Defines whether USB or SCCs that asserts its request in the SCCa priority
position.
00 USB asserts its request in the SCCa position.
01 SCC2 asserts its request in the SCCa position.
10 SCC3 asserts its request in the SCCa position.
16–18 IRL
Interrupt request level. Contains the priority request level of the interrupt from the CPM that is sent
to the SIU. Level 0 indicates highest priority. IRL is initialized to zero during reset. In most systems,
value 0b100 is a good value to choose for IRL.
2
3
4
5
0000_0000_0000_0000
18
19
20
21
HP
0000_0000_0000_0000
Table 35-3. CICR Field Descriptions
Chapter 35. CPM Interrupt Controller
6
7
8
9
—SCdP
R/W
0x940
22
23
24
25
IEN
R/W
0x942
Description
CPIC Registers
10
11
12
13
—SCcP
—SCbP
26
27
28
29
14
15
—SCaP
30
31
SPS

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