Instruction Support Control Register (Ictrl) - Freescale Semiconductor MPC850 User Manual

Table 44-19 describes BAR fields,
Bits Name
0–31 BARV

44.5.1.3 Instruction Support Control Register (ICTRL)

The instruction support control register (ICTRL), shown in Figure 44-18, is used to
configure instruction breakpoint operations.
Bit 0 1 2 3
Field CTA
Bit 16 17 18 19
Field IW2 IW3 SIW0EN SIW1EN SIW2EN SIW3EN DIW0EN DIW1EN DIW2EN DIW3EN IFM ISCT_SER
Reset
R/W
SPR
Figure 44-18. Instruction Support Control Register (ICTRL)
Table 44-20 describes ICTRL fields.
Bits Name
0–2 CTA Compare type of comparator A–D
0xx Not active (reset value)
3–5 CTB
100 Equal
101 Less than
6–8 CTC
110 Greater than
9–11 CTD
111 Not equal
12–13 IW0 Instruction first watchpoint programming.
0x Not active (reset value)
10 Match from comparator A
11 Match from comparators (A & B)
14–15 IW1 Instruction second watchpoint programming.
0x Not active (reset value)
10 Match from comparator B
11 Match from comparators (A | B)
16–17 IW2 Instruction third watchpoint programming.
0x Not active (reset value)
10 Match from comparator C
11 Match from comparators (C & D)
18–19 IW3 Instruction fourth watchpoint programming.
0x Not active (reset value)
10 Match from comparator D
11 Match from comparators (C | D)
Table 44-19. BAR Field Descriptions
The address of the load/store cycle that generated the breakpoint.
4 5 6
CTB
20 21 22
0000_0000_0000_0000
Table 44-20. ICTRL Field Descriptions
Chapter 44. System Development and Debugging
Development Support Programming Model
Description
7 8 9
CTC
23 24 25
R/W
158
Description
10 11 12 13 14 15
CTD IW0
26 27 28 29 30 31
IW1