The Powerpc Timebase; Decrementer Register (Dec) - Freescale Semiconductor MPC850 User Manual

The PowerPC Timebase

10.8.1 Decrementer Register (DEC)

The decrementer register (DEC) is a PowerPC SPR. It can be read or written to by mfspr
or mtspr. DEC is powered by KAPWR and continues counting when KAPWR is applied.
Control of the decrementer is provided in the TBSCR. The decrementer and timebase use
TMBCLK. Note that DEC is a keyed register. It must be unlocked in TBK before it can be
written.
Bit 0 1
Field
Reset
R/W
SPR
Table 10-15 describes the DEC register.
Bits Name
0–31 DEC Decrementer. These bits are used by a down counter to cause decrementer interrupts. Reading DEC
always returns the current count value from the down counter.
10.9 The PowerPC Timebase
The PowerPC timebase is a 64-bit free-running binary counter. For the MPC850, the
timebase is clocked by TMBCLK. The timebase period is as follows:
The timebase is unaffected by RESETH and RESETS and should be initialized by software.
Note, however, that it is disabled and reset by PORESET. The entire timebase cannot be
accessed with a single instruction; mttb and mftb access the lower half of the timebase and
mttbu and mftbu access the upper half. A maskable interrupt is generated when the
timebase count reaches a value programmed in one of the reference registers, TBREFA and
TBREFB; two status bits indicate which one caused the interrupt.
2 3 4 5
Figure 10-18. Decrementer Register (DEC)
Table 10-15. DEC Field Descriptions
T =
TB
MPC850 Family User's Manual
6 7 8 9
DEC
—
R/W
22
Description
2 64
---------------------- -
F
tmbclk
... 30 31