Branch Instruction Address Calculation; Branch Instructions - Freescale Semiconductor MPC850 User Manual

Some branch instructions can redirect instruction execution conditionally based on the
value of bits in the CR. When the branch processor encounters one of these instructions, it
scans the execution pipelines to determine whether an instruction in progress may affect the
particular CR bit. If no interlock is found, the branch can be resolved immediately by
checking the bit in the CR and taking the action defined for the branch instruction.
If an interlock is detected, the branch is considered unresolved and the direction of the
branch is predicted using static branch prediction as described in "Conditional Branch
Control" in Chapter 4, "Addressing Modes and Instruction Set Summary," in the
Programming Environments Manual. The interlock is monitored while instructions are
fetched for the predicted branch. When the interlock is cleared, the branch processor
determines whether the prediction was correct based on the value of the CR bit. If the
prediction is correct, the branch is considered completed and instruction fetching continues.
If the prediction is incorrect, the fetched instructions are purged, and instruction fetching
continues along the alternate path. See Chapter 8, "Instruction Timing," for information
about how branches are executed.

5.2.4.3.1 Branch Instruction Address Calculation

Branch instructions can alter the sequence of instruction execution. Instruction addresses
are always assumed to be word aligned; the processor ignores the two low-order bits of the
generated branch target address.
Branch instructions compute the effective address (EA) of the next instruction address
using the following addressing modes:
• Branch relative
• Branch conditional to relative address
• Branch to absolute address
• Branch conditional to absolute address
• Branch conditional to link register
• Branch conditional to count register

5.2.4.3.2 Branch Instructions

Table 5-12 lists the branch instructions provided by the PowerPC processors. To simplify
assembly language programming, a set of simplified mnemonics and symbols is provided
for the most frequently used forms of branch conditional, compare, trap, rotate and shift,
and certain other instructions. See Appendix F, "Simplified Mnemonics," in The
Programming Environments Manual for a list of simplified mnemonics.
Chapter 5. MPC850 Instruction Set
Instruction Set Summary