Utopia Interface; Apc Timer (Cpm Timer 4); Risc Timer; Utopia Mode Registers - Freescale Semiconductor MPC850 User Manual

UTOPIA Mode Registers

Table 42-1. PDPAR Field Descriptions (Continued)
Bits Name
2 — Reserved
3–15 DDx Signal assignment. Determines whether the signal is a general-purpose I/O signal or
performs a dedicated function.
0 =General-purpose I/O. The peripheral functions of the signal are not used.
1 =Dedicated peripheral function. The signal performs the function assigned by the

42.1.2 APC Timer (CPM Timer 4)

The CPM general-purpose timer number 4 is used internally by the ATM pace controller as
the APC timer for both serial ATM and UTOPIA modes. The APC timer should be
programmed to run in active-low pulse and restart mode (see Section 17.2, "CPM
General-Purpose Timers"). The APC timer period should be programmed according the
required APC rate, which is discussed in Section 40.1, "APC Algorithm."

42.1.3 RISC Timer

A dedicated RISC timer programmed by host software with the desired time-out interval
can be used to implement a receiver time-out error check. The RISC timer is specified in
TSTA (time-stamp timer address) in the ATM parameter RAM. See Section 18.7, "The
RISC Timer Table," for additional information.
42.2 UTOPIA Mode Registers
When operating in UTOPIA mode the PHY layer is connected to the MPC850 UTOPIA
interface. The UTOPIA data signals and some of the control signals are connected to port
D. The remaining UTOPIA control signals are connected to ports B and C. The UTOPIA
mode requires several registers to be configured as described in the following sections.

42.2.1 System Clock Control Register (SCCR)

SCCR is described in Section 14.6.1, "System Clock and Reset Control Register (SCCR)."
SCCR[27–31] control the UTOPIA clock (UTPCLK).
internal module.
MPC850 Family User's Manual
Description