Sleep Mode; Deep-Sleep Mode - Freescale Semiconductor MPC850 User Manual

Mpc850 family integrated communications microprocessor
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Upon resumption of processing in normal high or low mode, the MPC850 jumps to the
external interrupt vector to process the interrupt source. When the core returns from the
exception handler via rfi , it resumes processing from the instruction following that which
initiated entry into doze mode. The one exception to this is the decrementer, a wake-up
interrupt from the decrementer never causes a jump to the interrupt handler; instead
processing always resumes from the instruction following that which initiated entry into
low-power mode.

14.5.5 Sleep Mode

In sleep mode, the only internal modules that are activated are the SIU timers, including the
real-time clock (RTC), periodic interrupt timer (PIT), timebase (TB), and decrementer
(DEC).
Sleep mode is selected if PLPRCR[LPM]=10. Only PITRTCLK and TMBCLK are active
in sleep mode. Clocks to all other modules are disabled. Note that because the SIU memory
controller is not activated in this mode, memory refresh does not occur. Note also that
PLPRCR[TMIST] should be cleared before entering sleep mode; for more information, see
Section 14.5.8, "TMIST: Facilitating Nesting of SIU Timer Interrupts."
The following events cause the MPC850 to leave sleep mode and enter normal high mode:
• An external IRQx input is asserted for which wake-up capabilities are enabled.
Wake-up capabilities for IRQx interrupts are enabled in the associated SIEL[WMx]
bits.
• A time-out event of the RTC, PIT, TB, or DEC occurs.
When the MPC850 leaves sleep mode, it enters normal high or normal low mode,
depending on the state of PLPRCR[CSRC] and SCCR[PRQEN]. When the MPC850 enters
normal high mode, PLPRCR[LPM] is cleared.
Upon resumption of processing in normal high or low mode, the MPC850 jumps to the
external interrupt vector to process the interrupt source if that interrupt is enabled in
SIMASK and MSR[EE]. When the core returns from the exception handler via rfi , it
resumes processing from the instruction following that which initiated entry into sleep
mode. The one exception to this is the decrementer, a wake-up interrupt from the
decrementer never causes a jump to the interrupt handler; instead processing always
resumes from the instruction following that which initiated entry into low-power mode.

14.5.6 Deep-Sleep Mode

Deep-sleep mode is similar to sleep mode, except that the SPLL is also disabled and,
therefore, the wake-up time from this mode is longer. Wake-up time from deep-sleep mode
is a maximum of 500 OSCCLK clocks (if OSCCLK is sourced by OSCM) or a maximum
of 1000 clocks (if OSCCLK is sourced by EXTCLK).
Chapter 14. Clocks and Power Control
Power Control (Low-Power Modes)

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